V. Anandi

V. Anandi

Present Status: Asst. Professor

email: anandi0728@rediffmail.com

Education

B.E in Electronics & Controls Engg (Madurai kamraj University) M.S in Electronics (BITS, Pilani, Rajasthan)  

Registered  for Phd under ANNA UNIVERSITY,Coimbatore in Jan'09 under the giudance of Prof.Dr.Rangarajan, in VLSI low power estimation 

Work Experience:

Teaching: 17 years

Area of Specializations:

Digital Electronics, Telecommunication Engineering, VLSI

Subjects teaching:

Computer Organization, Logic Design, Tranmission lines & Networks, Fundamentals of CMOS VLSI, Digital System design usign VHDL.

Papers Published:

“Analysis of Single/Dual-Rail mixed Pass Transistor/Static Logic for low power applications” at MAE, PUNE in Emerging Trends in Signal Processing and Communication ETSPC2007 in Dec 2007.

“Low Power Design” for integrated systems at Tech Symposium –Vemana Institute of Technology, Bangalore

Organized a seminar for V & VII sem E&C students on VLSI IC fabrication.

Fellowships:

Member of Institution of Electronics and Telecommunication.

Life Membership of Indian Society For Technical Education.

FELLOW VDAT (VLSI Design and Test Society of INDIA)

Workshops Attended

3 day National conference on “Emerging trends in signal processing & communication” conducted by Dept of Electrical & Electronics of Maharashtra academy of engineering”(MAE, PUNE) from 27th to 29th DEC’07 & presented a paper titled “Single rail/Dual rail Mixed PTL”

Attended the UGC sponsored course for university and college teachers on “An integrated approach to knowledge and information” from Jan 16th to Feb 05th 2008

Attended a 5 day course on vlsi design conducted by IUCEE at INFOSYS CAMPUS MYSORE from 7-7-08 to 11-7-08

Attended 5-day faculty development workshop on cadence tools from 23-06-08 to 30-06-08 at REVA INSTITUTE OF TECHNOLOGY, BANGALORE.

Attended the 4 day tutorial and symposium on Vlsi Design, 12th IEEE VLSI Design And Test Symposium from 24th July’08 to 26th July’08 at the Learning Center located in the campus of WIPRO Technologies, Bangalore.

Attended the 3-day international symposium on low power “ISLPED 2008” at J N TATA Auditorium from 11-08-08 to 13-08-08 at IISc, Bangalore.

Attended 2 day national conference on communication on 15th 16th October 2008 at VEMANA INSTITUTE OF TECHNOLOGY &presented a paper titled “Low power design for integrated systems”.

Attended the industry university interaction program AP UR SUMMIT ’08 conducted by IBM at Bangalore.

Attended the All India project exhibition conducted by WIPRO.